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National Repository of Grey Literature 3 records found  Search took 0.02 seconds. 
Modelling of 8051 Processor
 Krůpa, Tomáš ; Kajan, Michal (referee) ; Masařík, Karel (advisor)
Computer modeling is nowadays very important part of development of almost any new product. The objective of this bachelors thesis is to develop a model of 8051 microprocessor that should enlarge a portfolio of customizable processors available for Codasip platform. The complete model is described in two levels of abstraction the instruction accurate model and the cycle accurate model. For verification of the model, ANSI C programs translated by SDCC compiler were used.
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Predefined Quality Profiles in Different Versions of HEVC Encoder - Influence of PC Architecture of Processor
 Kufa, Jan
This paper describes a coding efficiency of the High Efficiency Video Coding (HEVC) encoder with different predefined quality profiles. To increase the encoding speed of the video at the same bitrate we can use either other implementation of the encoder or we can set different predefined quality profiles. The x265 is the implementation of the coding standard HEVC. This article complements of our previous exploration of predefined x265 profiles. There is explored the influence of processor architecture and version of x265 implementation on the speed of encoding and on the performance of video quality.
Detailed record
Modelling of 8051 Processor
 Krůpa, Tomáš ; Kajan, Michal (referee) ; Masařík, Karel (advisor)
Computer modeling is nowadays very important part of development of almost any new product. The objective of this bachelors thesis is to develop a model of 8051 microprocessor that should enlarge a portfolio of customizable processors available for Codasip platform. The complete model is described in two levels of abstraction the instruction accurate model and the cycle accurate model. For verification of the model, ANSI C programs translated by SDCC compiler were used.
Detailed record

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